Lecture 13: Digital Circuit Speed

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Lecture notes (PDF)
Demonstration: Gate delay (PDF)
Demonstration: Crosstalk (PDF)

• Download this transcript - PDF (English - US)

OK. Good morning.

In the last lecture I did a little demonstration for you where I showed you a pair of inverters.

And showed you that the output of the first inverter looked weird, certainly not like anything we have seen thus far.

It looked like a slow rising transition like this.

And using that motivation we have begun our study of RC circuits. And in particular for today the lecture is titled "Digital Circuit Speed".

We are going to look at the fundamentals of digital circuit speed. And it all boils down to an RC delay. By the end of the lecture, I am going to show you two numbers that you can look at a circuit and obtain by observation, multiply them out and you will get a good idea of the speed at which a circuit will run. It is pretty amazing.

So as a quick review -- The relevant section for this is Chapter 10.4. As a review, we said to understand things like this we need to develop the foundations for RC circuits. And the example I covered was that of a very simple circuit that looked like this -- An RC circuit of this form. And I also showed you that for an input of the form, input that steps from zero to VI at time T equal to zero. And assuming that the capacitor state at time T equals zero was zero.

What this means is that the capacitor starts from rest, so at time T=0, oops, this is VI, I'm sorry. So we assume that the capacitor starts from rest. At time T=0 I apply a VI step, capital VI. And then I want to look at how the voltage across the capacitor behaves.

And we did a bunch of analysis. And at the end of the day, in the final demo in the lecture last time I showed you that the capacitor would behave like this.

It would start off at, oops.

I am sorry. This should be, let's assume that started off at VO.

We get a different equation for zero.

So let's say the capacitor started off at VO, in which case VC at time T=0 is VO as expected.

And we showed that the output would look something like this.

After a long period of time this would come up to VI and this rise had a time constant of tau=RC.

So we wrote the equation for this waveform.

And this is the case when VI is greater than VO.

I would like you to stare at the circuit and this result here to get more intuition on what is going on.

At time T=0, VC starts off at VO as expected because I am telling you that is the case, that is initial condition. It starts off at VO.

Then this one steps to VI. There is no infinite transition anywhere here, and so the capacitor holds its voltage at VO, at time T=0.

And then the VI here, which is greater than VO, begins to charge the capacitor up, charge it through this resistor. And so therefore the capacitor charges up. After a long period of time, from the basic foundations of capacitors, we know that the capacitor appears like a long-term open circuit to DC.

This is a DC voltage VI. So it appears like an open circuit. So after a long period of time VI appears at the end. And from here to here I have an exponential rise that is typified by an equation of the form -t/RC. This kind of waveform rising from a smaller value to a higher value is typified by this expression. We saw the expression when we developed the equations last time.

On the other hand, if the input was such that VI was smaller than VO, so let's say VI was smaller than VO then what will happen is that the capacitor voltage would start off at VO, because I am telling you that is the initial condition, and would then decay in this manner to the final value of VI which is the input.

Instead of going up this way it decays down to the final value applied to the circuit. Again, the time constant is RC.

But this is typified by a form, this is exponential rise and this guy e^-t/RC is an exponential decay.

The key thing to remember is that when you have RC circuits of this form, the waveforms that you get are either each of the e^-t/RC or 1-e^-t/RC.

So you can now begin to see how waveforms such as that come about. We will do an example and sit down and compute the inverter delay.

And notice that this waveform here is very typical or corresponds to this waveform that we see here.

Here I am starting at VO. And assuming this axis starts off at zero, this one starts very close to zero and then rises up to some final value. So far I have reviewed some material for you that I covered the last time.

As a second step, I would like to give you a much more intuitive approach -- -- that doesn't involve solving any differential equations. And the reason I do this is that most experienced circuit designers do not sit down and write differential equations each time they see an RC circuit. When you are starting out and you see an RC circuit, you say node method and you write the differential equation, but experienced people don't do that. They look at it and they can sketch the waveform out by inspection.

And I will show you how to do that.

It is indeed incredibly simple once I give you some intuition.

Throughout the rest of this course, I will be showing you many such examples where initially I develop the foundations of stuff and then show you an intuitive approach that very quickly lets you either get the final answer or at least sanity check the answer that you have gotten.

And this is how experienced circuit designers deal with stuff. How many people here have seen this movie Bend it Like Beckham? So you know this Beckham character doesn't think about how he is going to curve the ball. He just does it and it happens.

He doesn't sit down writing differential equations to find out the projectile trajectory and all of that stuff.

You just kind of do it. These series of intuitions I am going to give you is going to be in line with the Bend it Like Beckham kind of intuition. And this one in particular I would like to do in honor of one of your recitation instructions Professor David Perreault. And so this piece of intuition is going to be termed "Practice it Like Perreault".

Watch what I do with the other names.

Professor David Perreault is really a world expert in designing really incredible power supplies for very, very small chips and so on. He doesn't start writing differential equations to do this stuff.

He looks at it and sketches it out.

Let me show you how he would do this.

Suppose I have my circuit like before, VI, R and C, and I am telling you that VC(0)=VO.

And my input VI is a step that looks like this.

VI is a step. How would Professor Perreault do this? Let's do it completely by intuition. No math here.

All right. We know that I have told you that this guy starts off at VO. I am telling you that.

You know it is going to start at VO.

And there is no impulse or huge infinite transition, and so the capacitor starts off at VO.

We also know from basic capacitor properties that after a long period of time, in the steady state, this is but a DC voltage. If you apply a DC and here is my capacitor. After a long period of time this guy is going to look like an open circuit.

It is going to charge up to some value and then is going to look like an open circuit. Because if it didn't, you would keep charging it and its voltage would keep increasing. That doesn't happen, it looks like an open circuit. So it looks like an open circuit in the long run. The voltage across it must be capital VI. If I don't have current flowing in the circuit then the only way that can happen is -- This open circuit. Capital VI appears across the capacitor. Well, after a long period of time I know that the output must look like this.

In this case, I have assumed VI is greater than VO. So you have two points of your curve, VO and VI after a long period of time.

And, as I told you earlier, with capacitors you get two kinds of curves. Two things.

What you do is go zoop. There you go.

You're done. And this has an exponential rise. This is with the form 1-e^-t/RC. So we can write an equation for that as follows. VC we know has something to do with minus t/RC. This is of that form, so there has to be that term in there somewhere.

And I start off with VO. At time T=0 this is one and this is one, so this term becomes a zero.

At time T=0 that becomes a zero so I get VO here.

I am going to make sure this stuff stays zero at time T=0, so I start off with VO. Now, as time wears on what happens here? This voltage here, VI-VO, if you look at this difference.

That is exponentially decaying over time.

And so therefore all I have to do here is write VI-VO.

There is the answer. I know the form of the curve.

I am just fitting an expression that meets this form.

This starts off at VO. When time T=0 this second expression is zero and so it is VO.

And this difference here decays down to zero.

And this difference here, VI-VO is multiplied by this term here and that is what I get.

And you can confirm this. At time T=0 this is zero.

At time T infinity this goes to zero, this goes to zero leaving a one, and VO and minus VO cancel and I get a VI.

Virtually any such simple voltage source, current source, resistor, capacitor, circuit for most inputs like steps and so on can be analyzed in this manner. Initial value, final value, it's simple.

And just to show you that this is simple, I am going to label this expression this way. It is of the form 1-e^-t/RC.

Just remember that. Now, by the same token, what if VI had been smaller than VO?

Then that is simple, too.

I would have had my VI being here.

VI would have been here. And that is of the form.

In this particular situation, here is my VI, my starting value and I do this.

And just to label that, let me label that this way.

I just told you that for RC circuits you go this way or you go this way. So it is down here.

I get some kind of an exponential decay.

And, like before, think of this one.

This one has VI as a base value here.

And the difference between the two is VO minus VI.

And that difference decays. So I have a VI out here, and this difference decays so I get VO-VI and that decays in this form. So I get an exponential decay of this difference here. Just stare at it for a while longer. You should be able to just go and knock it off like this, just like Professor Perreault would. No differential equations.

Just write it down by looking at the curve.

Let's keep these two in mind, OK, these forms?

One is the 1-e^-t/RC form and the e^-t/RC.

Both have a time constant RC. Let me just make this a dashed line just to be on the safe side here.

That is our first piece of intuition.

And, as I pointed out before, in problems you face in life or in ones that we give you, feel free to use the intuitive method. Or what you can do is apply the mathematical method and then check your answer by using your intuition. What I would like to do next is apply what you have learned so far to figure out what we set out to figure out, which is the delay of my inverter. I had promised you that by the end of this lecture I was going to close the loop on that little demo. I was going to close the loop for you on this little circuit that we had looked at, one inverter driving another inverter.

This was A, this was inverter X, and this was my node B.

The green curve you see out there, the middle one has a transition shown up there. And what I am going to do next is use the results we have gotten so far to compute a number. We are going to compute a delay number both for a rising transition.

We will call that delay DR for rising transition.

And we will compute a delay for the falling transition DF.

Remember, that this is the input that falls down sharply.

The intermediate node B rises much more slowly.

And because this rises much more slowly this guy here falls a little after this transition here, and so there is a delay.

And I am going to apply what we have learned so far and do an example for you and figure out what that delay is.

This is an absolute foundational calculation done in building digital circuits all the time.

It is remarkable that something so simple is used in designing even the most complex of circuits to obtain very quick ideas of what my delay will look like when I have some subcircuit driving some other piece of subcircuit.

Let me just draw a few equivalent circuits for you.

The internal circuit looks like this.

This is my inverter X, A, my node B.

And notice that I have this capacitor CGS.

Since I am interested in this node, let me show you that, this capacitor explicitly, it is because of this capacitor here that arises because of this MOSFET here between the gate and the source. And that capacitor gives rise to this RC thing that we are seeing.

This is RL, this is RL, VS, VS.

And let's say, just as up there, at time T=0 I get a transition like so, a falling transition from say 5 volts to 0 volts at the node A.

This is VA here. That is shown up there.

And VB -- We had expected that VB would look like this.

We expected VB to be instantaneous and looking like that, but instead because of the capacitor VB looks like this.

And remember, again, this is of the form 1-e^-t/RC. And we will write down the answers by inspection. From this let me draw the connection to circuit delay by showing you another little graph here t, VB, zero. And what I am going to show you, this is 5 volts. And so the output goes like this from close to zero to 5 volts.

It is close to zero. Because, at least with the inverters we have been seeing in lab and so on, the RON for the inverter is very, very small compared RL.

So it is virtually zero down here.

And so what is the delay? I mentioned there are two delays of interest. One is the rising delay.

That is the logical value at the end, if I wait a long enough period of time, is a logical one.

Delay is simply defined as starting from here how long does this output take to get to a valid one?

At what voltage here can I say that this transition corresponds to a logical one? At what voltage here can I say that that represents a valid one?

Any ideas? Yes.

It depends on the discipline, bingo.

So it depends on the discipline.

Now let's get more specific. Since it depends on the discipline, at what value based on something in the discipline can I say this thing is a logical one?

This is an output remember. VOH, bingo.

There is some VOH somewhere. And it takes some amount of time to get to a valid logical one output, ergo there is your delay. This is tR.

And I call this the rising delay of the inverter X.

It is interesting that the rising delay of inverter X, based on our model, depends on the parameters of this inverter and the parameters of whatever it is driving.

So remember that the delay is not necessarily just the property of the inverter itself, but it depends on the context.

If I stick my inverter before another inverter like this, it is the capacitance on that inverter by our model that tells me what the delay is going to look like, of course in addition to RL. And we will do the math in a few seconds. By the same token, if I had this wire connecting not to one inverter but going to ten other inverters, I expect to have a capacitance equal to ten times CGS. And so therefore this thing should rise even more slowly, correct?

The more capacitance on here the slower it rises up.

Simple. If I put more and more load on this line by putting more and more MOSFETs on that line, more and more inverters this will rise slower.

In our example I just have one, so let's go ahead and compute the delay. This is called the rising delay of X. That says that for this node here to go from its output value to a valid one, which is VOH how long does it take?

Notice that if this capacitor was zero then you would have seen an instantaneous transition.

If you have an instantaneous transition then notice that the rising delay was zero. That was the model we had looked at up until learning about capacitors.

So let's go ahead and compute the number.

I can draw an equivalent circuit for computing a rising delay. The equivalent circuit for the rising delay looks like the following.

The VS voltage source, with a resistor RL and a capacitor CGS, because when I turn this guy off, this guy has gone off, and so as far as the rise time of this node is concerned I can look at this circuit, ground through CGS through RL through VS back to ground.

And just for simplicity, let me draw this in a form that we understand.

CGS. Let me use this as my ground node. And this is the voltage VB.

And this is RL. And V is simply VS once that transition happens. My other equations here, VI=VS. And what is VB(0)?

VB(0) is at what value does this node start out?

Notice that for simplicity here if this RON is much, much smaller than RL, then this node would be very close to ground. So I will just go ahead and say that VB at T=0 is approximately zero.

And then what I want to find out is what does the value look like for time starting from zero and then going forward?

Well, we have become experts at this now.

Let's do the intuition here. Start off with zero.

That's good. Because my initial value is zero, I start off here. What is the final value?

After a long time, since this is a DC voltage, what would be the value at VB after a long time?

Pardon? VS.

If I wait long enough then it is going to be at VS.

This is greater than the initial value, so we're done. That is my 1-e^-t/RC form.

It took me three seconds there. It's pretty cool.

We could add the expression for this.

And the expression was I take my starting value, which is zero, and I add to that this difference VS and I multiply that by this form.

There we go. And remember I get this from that rising form up here. V0=0, this is zero, so it is simply VI times that, and VI=VS.

I really would like you to get this intuition.

If I had two choices, one is that you understand the intuition and are able to sketch that versus in your sleep be able to solve the differential equation and get to the answer.

I would much rather you get the intuition, if it is one or the other. It is very simple.

Start off at zero, I go chuck, and boom, I get to VS and this is my 1-e^-t/RC form.

I need to compute tR. And tR is the time that this takes to get to VOH.

For what value of time, for what T, does VB reach VOH?

I want to find tR. What's tR?

From that equation, that simply tells me the trajectory of VB as a function of time.

And so I need to find out what is T for which VB is VOH?

I write VOH=VS (1-e^-t/RC). So after a rise time my output is going to be VOH. And so let me go ahead and find tR. Let's see.

I bring this to this left-hand side and divide VOH by VS, and then I move things around and what I end up getting is -tR/RC and on the other side I get ln(1-VOH/VS).

Divide VOH by VS, that is this, move this to the other side, and move e^-t/RC to this side.

And take logarithms on both sides.

This is what I get. tR is therefore -RLCGS ln(1-VOH/VS). That is my rise time.

You can just do this by inspection.

It is just so awfully simple. Just to give to some intuition with numbers and so on. Let's say that RL=1K, VS=5 volts, VOH=4 volts, CGS=0.1 pF.

This happens so often that we often time call it "puff".

0.1 puff. It is pF, it's called puff.

If it is nF, I don't know why they didn't call it "nuff". They just call it nanofarads.

TR for these numbers gets to be one times ten to the three times point one times ten to the minus twelve for pico-farads ln(1-4/5). And if you do the math you get this down to 0.16 nanoseconds. This means that if I had an inverter like that droving another inverter then my output transition would be delayed by 0.16 nanoseconds.

Trust me, when Intel builds microprocessors or when Broadcom builds its cable modem chips, they have to do this one way or the other using a computer tool or by hand for virtually every little subcircuit in their chip. That is how you get the delays or some approximation thereof. What I want you also to do is, for no particular reason, I will just compute for you the following quantity RLCGS. The time constant of that circuit for no reason at all. I am just going to compute it and stick it here. And RLCGS 1 K times 1 pF is simply 0.1 nanoseconds. I am just writing it and sticking it there for no particular reason.

The next step let's do the falling delay, DF. That is the rising delay.

And, although I didn't show this to you in the demo, there is a corresponding delay of the fall time.

It doesn't fall instantly, but rather it falls rather slowly. Let's draw the equivalent circuit for when the node X falls.

Notice that in my inverters here, this node starts off being at VS. This is high.

And this is going to fall because when I turn this transistor on it is going to pull this node to ground or it is going to fall down. And what is the equivalent circuit? The equivalent circuit is that ground through capacitor to this node.

At this node I have RON connecting to ground and I have RL connecting to ground through VS.

Let me draw that little circuit for you.

Remember life begins and ends on storage elements, so I will draw them first. My storage element CGS.

That is VB. And, as I said, this is node X, it goes from RON to ground, and it also goes through RL through VS to ground.

And in this particular situation VB of zero for the following delay, VB starts off at VS so VB of zero is VS. And the final output I am not sure yet. What is the final value of the voltage at this node? I don't know that yet.

I need to compute that. So what I will do is whenever you see something like this, a capacitor connecting to linear stuff, or a nonlinear element connecting to linear stuff. For no apparent reason you should at least think about what?

Think Thevenin, exactly.

And then see if you can use the Thevenin method to simplify your life. Capacitor, a bunch of stuff here, I need to find out the initial value.

Oh, I know that. That is VS.

Done. I need to find the final value using my intuitive method. For the final value, I could do it just by looking at this, but I wanted to throw in Thevenin. Hey, let me try to the Thevenin equivalent and see if that makes my life any easier.

VTH. The Thevenin method says that you can replace this circuit here with a Thevenin equivalent of the sort for the purpose of determining what happens at this node given that that is linear.

So I need to find out that for the purpose of determining what happens at the node X. I have to replace this with its Thevenin equivalent. And I now need to find out RTH and VTH. So I get RTH by looking in here, shorting this guy and looking at the resistance.

So I look in like this, then I short this guy here and I get RL in parallel with RON because this one shorts to ground. So RTH is simply RL in parallel with RON. This is a convenient notation for RL being in parallel with RON.

And you all know the value of that.

It is another one of our very simple patterns like voltage divider and so on. Resistances in parallel can be computed as RL RON divided by RL plus RON.

What is VTH? VTH is the open circuit voltage here. If I take out this capacitor, I want to find out what the voltage here is.

Ah-ha, voltage divider. VS, the voltage divider here, RL and RON. I could write this down as VS times RON/(RL+RON). Remember you will see again and again and again and again in 6.002 or any circuit stuff that you do, you will see them all over Thevenin.

Voltage dividers, current dividers, resistances in series, resistances in parallel, RC thing-a-ma-jigs like this. So if you just remember those 10 to 15 intuitive patterns then you are pretty much set for life. It just comes on again and again and again. Parallel resistors.

Voltage dividers. You should be able to write down a voltage divider in your sleep.

So this is what I have. Let me now write down intuitively what I expect the node X to do just by inspection.

Let's see. What is the initial value of the voltage across the capacitor, intuitive method?

This is how Professor Perreault would do it, remember?

He would start off by saying ah-ha, initial value is VS because I am told it is VS. I start off with VS.

And so I start off here. What is the value after a long, long time based on this circuit here?

V Thevenin. After a long time this is a DC voltage because that is a DC voltage.

The capacitor looks like an open circuit after a long time.

And VTH appears there so it is simply V Thevenin.

And then when you see those two, boy, I love doing this, you go like this. That is the coolest part.

And then I am done. It is so simple.

Three seconds or less, I am able to tell you what the delay of an inverter is purely by intuition, completely intuitively. I mean I haven't done any solving. It is just by observation.

Took this circuit, made my life easy, Thevenin, looked at RTH, VTH and then sketched it by inspection. Again, if you find that things are really, really, really simple don't be surprised. Once you get some conceptual understanding things are indeed very simple.

You can eliminate a lot of math just by staring at things attempting to build up the intuition.

As a next step what I can do is write down the expression for VB. And I write down the expression from a falling transition. How do I do it?

What was it? What is the method?

I take the lowest value of interest here.

That is VTH. And then I add to that this difference decaying exponentially.

And that difference is simply VS-VTH.

And that decays exponentially. This form is the e^-t/RC form.

And, boom, I am done. Many of you are wondering, Professor Agarwal, if life was so simple, why on earth did you have us mess around with those differential equations to get here?

You show us differential equations and then you don't use them anymore. Well, that is a good question.

The answer to that is that you need to understand the foundations. Once you understand the foundations you can find simplifying techniques to get to where you need to be, but you need to understand the foundations. You need to at least see why things are the way they are at least once.

Understand the foundations and then find intuitive ways of getting your answers. So now my falling delay here is, I start off with VOS and I need to get all the way down to what value to compute. At some point here, this is a valid one, at some point VB becomes a valid zero for the output. And that is when I stop my tF block. What is the value here for this to be a valid zero? Don't all yell at once.

VOL. I simply had to figure out what is the value of time, this is Page 7, for which this expression decays down to VOL.

So it is VTH+(VS-VTH) e^-tF/RC. Then I simplify this.

How do I do that? VOL-VTH.

Then I divide that by VS-VTH. So VOL-VTH.

Divide that by VS-VTH. Take logarithms on both sides and then multiply by RC. So I get tF is -RC log of that.

This is R Thevenin and this is CGS.

How did I get this? VOL-VTH divided by VS-VTH.

Take logs on both sides. And then multiply throughout by -1/-RC and I get my tF. Done.

Let's do it for the same set numbers, just that we add an RON of 10 ohms. I will do this for RON of 10 ohms and compute the value for you.

tF=-RTH. RTH is RON parallel RL.

This is 10 ohms. That is 1K.

So 10 ohms in parallel with 1K is approximately 10 ohms.

So let me just use approximately 10 ohms.

1 pF, that is RC times ln of VOL.

Oh, I need to give you a VOL. Let's say my discipline has VOL being 1 volt. And so therefore I end up getting a VOL-VTH divided by VS-VTH.

Since RON is much, much, much smaller than RL, since RON is 10 ohms and this is 1K, most of VS will drop across RL. This is a hundred times smaller. Compared to VOL, which is 1 volt, VTH is very, very small. VTH will be on the order of 0.05, and so therefore I simply write down VOL here and say VTH is approximately zero, and I get VS-VTH.

This is approximately 5. So let me just say this is approximately. And if you do it you will get 1.6 pico-seconds. Again, just for fun, let me write the corresponding RC time constant for the circuit, which is RTHCGS. So RTH is approximately 10 ohms and CGS is 1 pF, so this is 1 picosecond.

Now you will understand why I have been writing this time constant down. It turns out that the time constant is a very, very important number.

So you see an RC circuit, and you compute its time constant for an RLC connection like this, it is the series resistance times the capacitor. The time constant is a very important number. And usually the circuit delays are in the neighborhood of the time constant value.

In this case this is 1 pS. That is 1.6 pS.

And in this case we had 0.1 nS and 0.16 nS.

So the time constant itself is a good indicator of what your delays are going to be like. If you have no time, you are sloshing your cereal down in the morning and you need to know how long the delay of the inverter very quickly, you have three seconds. Just do the RC and that is a good first approximation. What I would like to do next in the last three or four minutes is set up a little demo for you for your recitation, and then your recitation will cover it.

This is a true story. This really, really happened. In this West Coast school, which shall remain nameless, they had a chip, they built a chip. And the chip had a bunch of pins, as you might imagine. And the pin, as you have a trace on a board, a wire on a board there are some capacitance attached to wires, between the wire and ground. And that is a capacitor.

And they just called it a load capacitance.

It could have been 0.1 pF or 0.01 pF or something like that.

What they found when they built this chip -- What they found was that the voltage here they expected to look like this, this computer science abstraction and so on, zero to one transition, boom, it should look like this. But for the reasons we saw today the observed transition was much slower and looked like this. So the students said ah-ha, let's speed up this chip. We can speed up the chip by looking at the RL and RON of my driving inverters.

And if I make RL small -- Notice if I make RL small my delay is small. If I make RON small my falling delay is small. So let's make really small RLs and RONs and let's all have fun. Unfortunately, what they observed was that by making RL and RON both small, the RC time constant small they expected to see a much sharper rise time. And this was the original.

But what really happened was -- They expected this to get faster and kind of look like this, but what happened was disaster struck. What they observed was something like that. This is a real-life story.

And so instead of getting something like this they go something like this. And why is that a problem?

That is a problem because notice when I expect to be at a zero, I got some spikes that went higher than VIL into the forbidden region and did bad things to me.

So let me show you a little demo and show you that that's exactly how the circuit is behaving.

Notice that this is what I expect but this is what I see.

Look at the purple curve here. Notice these spikes that are showing up there. This is true.

They saw it happen. And why is this happening?

It turns out that what was happening was that the two pins were next to each other. And I will show you a little demonstration here. Let's see if you can figure out why this was happening. Think of these as two pins and the pins are close together. I am just modeling the two pins with a role of wire. And what I am going to do is -- I am going to separate the wires and keep them far apart.

It is like keeping my pins far apart.

Hey, guess what happened? Those nasty spikes went away.

But then I cannot keep my pins 1 meter apart on a chip.

Your laptops are going to look 20 yards long.

You want the pins to be very close to each other so that you can have many pins on chips and therefore have very small systems. But then look, I get the spikes. Any idea why that is happening?

Why is that when the pins are close together I get those spikes? Any ideas?

Somewhat? We just learned about capacitors, so this must have to do with capacitors.

There is this parasitic capacitor between the pins, exactly. Here is what is happening.

Here is what I expect. I expect a nice square wave at the output. But instead I have a pin next to me. And I have a faster wave form driving it. And so therefore there is a parasitic capacitor here. And because of that I get something called "crosstalk". And the model for crosstalk is some resultant resistance with the parasitic capacitor and I get those spikes. And the 6.002 experts saw the solution. They said how do we fix this problem? 6.002 experts said the way we fix this problem if it is slow it may be better.

Instead of having sharp transitions let me drive it with slower transitions. Let's switch to the demo again.

You will see this in recitation, but I will show you the demo very quickly. I have a sharp transition of the input, which is that yellow thing out there.

I am going to make the transition slower.

Switch to a triangular wave. And you will notice the spikes go away. Oh, no.

That is the wrong one. The other one.

There you go. The moment I switch to a slower transition boom, the spikes go away.

You want to switch back to square?

There you go. The 6.002 experts saw the solution. Slower transitions.

And you will do this example in detail in Section tomorrow.

Thank you.

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